1. Field of the Invention
This invention relates to the formation of conductive contacts in the fabrication of integrated circuits, and more particularly to a method and apparatus for preventing diffusion of the contact material into the underlying semiconductor.
2. Description of the Related Art
When contact metallization is placed in direct contact with an underlying semiconductor substrate during microelectronic fabrication, problems can develop from an interdiffusion of the contact metal into the semiconductor. This problem is illustrated in FIG. 1, in which a metallization layer 2 establishes a contact with a semiconductor wafer 4 through an opening in an insulating layer 6. In the illustration of FIG. 1, the metallization contact is made to a source or drain region 8 of a field effect transistor (FET), with the source/drain region 8 doped N+ and set in a P- well 10. The metallization, semiconductor and insulator will typically be aluminum, silicon and SiO.sub.2, although the described situation occurs with other materials also. The contact metal tends to interdiffuse into the semiconductor material at temperatures above about 400.degree. C., a temperature level that is commonly encountered during device packaging. This results in a spiking 11 of the metal into the semiconductor. The spiking generally extends for less than about 0.5 microns into the semiconductor, and thus is not a particular problem when the source/drain region 8 is greater than 0.5 microns deep. However, for thin geometries in which the source/drain region is less than 0.5 microns thick, the spiking can short the metallization layer to the P- well, thus rendering the device inoperative.
The conventional resolution of the contact metal intern diffusion problem is illustrated in FIG. 2. The semiconductor substrate 4 is capped with a layer of low resistance material, typically a silicide such as TiSi.sub.2. This reduces the sheet resistance of the source/drain region 8, which increases significantly with thin geometries. A contact diffusion barrier layer 14 is then applied over the silicide layer 12, and capped by an insulative oxide layer 16. Both of the layers 12 and 14 are established by a sputtering process. Electrical contact to the underlying source/drain region 8 is made by forming an opening through the insulating layer 16, and forming a contact through the opening to the diffusion barrier layer 14. This in turn establishes an electrical contact to the source/drain region 8 through the conductive layers 12 and 14, while the diffusion barrier layer 14 prevents interdiffusion of the contact metal into the underlying semiconductor during subsequent heating. TiN is usually sputtered on as the diffusion barrier material. In addition to inhibiting contact metal spiking, it also helps to reduce the resistivity at the surface of the source/drain region.
A problem has been encountered with this process, stemming from the fact that the sputtered layers 12 and 14 are quite thin, typically about 300-1,000 Angstroms thick. This problem is illustrated in FIG. 3. When a contact opening 18 is etched into the oxide layer 16, it is generally over-etched somewhat to ensure that a complete opening is made. It is difficult to prevent the portion of diffusion barrier layer 14 underlying the contact layer from also being etched away, either partially or completely. Thus, the diffusion barrier may be present everywhere except under the contact opening, but that is precisely where it is needed.
A modification of this approach is shown in FIG. 4, and is also described in U.S. Pat. No. 4,690,730 to Tang, et al. In this approach, the oxide layer 16 is laid down directly over the silicide layer 12. A contact diffusion barrier 20 such as TiN is sputtered over the oxide layer after the contact opening 18 has been made. Since sputtering of the contact diffusion barrier is done after the contact opening has been established, the problem of etching away the contact diffusion barrier from the area of the opening is eliminated. However, after the metallization has been laid down and patterned over the barrier layer, a separate patterning and etch procedure must be performed to remove the diffusion barrier material from the areas where the metallization has been removed. Together with the extra step required to lay down the barrier layer, the separate etch required for that layer adds an additional processing step that slows down throughput, and consequently increases the manufacturing cost. In addition, much of the barrier material is simply wasted when it is etched away, further increasing the costs of production.